M, A.; HAFIZ, M. S.; KHADER, I. M.; D, C. B. Design and Implementation of High-Speed AES and Visual Cryptography with Modified Mix Column on FPGA – A Survey. Perspectives in Communication, Embedded-systems and Signal-processing - PiCES, [S. l.], v. 6, n. 1, p. 1-3, 2022. DOI: 10.5281/zenodo.6544049. Disponível em: http://pices-journal.com/ojs/index.php/pices/article/view/285. Acesso em: 5 nov. 2024.