RAMESH, A. V.; KUMAR, A. R.; IYENGAR, A. S.; B, L. Y. Implementation and Design of FIR Filters using Verilog HDL and FPGA. Perspectives in Communication, Embedded-systems and Signal-processing - PiCES, [S. l.], v. 4, n. 5, p. 85-88, 2020. DOI: 10.5281/zenodo.4018834. Disponível em: http://pices-journal.com/ojs/index.php/pices/article/view/220. Acesso em: 22 nov. 2024.