Dayanand, S., K R, V., T, R., Shirur, Y.J.M. and Munavalli, J.R. 2020. Low Power High Speed Vedic Techniques in Recent VLSI Design – A Survey. Perspectives in Communication, Embedded-systems and Signal-processing - PiCES. 4, 6 (Oct. 2020), 147-156. DOI:https://doi.org/10.5281/zenodo.4247825.