Design and Implementation of High-Speed AES and Visual Cryptography with Modified Mix Column on FPGA – A Survey
DOI:
https://doi.org/10.5281/zenodo.6544049Keywords:
AES, Decryption, DES, Encryption, Triple DES, Visual CryptographyAbstract
Network security is one of prime importance with the advent of cyber-attacks, phishing and hacking occurring on a regular basis in the 21st Century. Though a lot of popular algorithms already exist for encrypting data such as AES, DES or Triple DES, there is a necessity for strengthening the existing algorithms to prevent a possible brute force attack on encrypted data. This paper explores a few papers aiming to achieve the same. It elaborates on the advantages and disadvantages of the existing algorithms and finally concludes with a proposal for a future implementation which can overcome the disadvantages.
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